[XEN][POWERPC] Fixes in cpu_flush_icache()

Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
--HG--
extra : transplant_source : %D1%13%8Bq%A5%097P%3An%C5%80%0D%7E%8FO%D8%B0b%E6

diff --git a/xen/arch/powerpc/powerpc64/ppc970.c b/xen/arch/powerpc/powerpc64/ppc970.c
index 11a67114854532604c6781c1bc20d909071a01a8..281ce05f394ac9187e97b186cb329d7a8b6b1b83 100644 (file)
--- a/xen/arch/powerpc/powerpc64/ppc970.c
+++ b/xen/arch/powerpc/powerpc64/ppc970.c
@@ -50,24 +50,25 @@ void cpu_flush_icache(void)
 {
     union hid1 hid1;
     ulong flags;
-    ulong ra;
+    ulong ea;
 
     local_irq_save(flags);
 
-    /* uses special processor mode that forces a real address match */
+    /* uses special processor mode that forces a real address match on
+     * the whole line */
     hid1.word = mfhid1();
     hid1.bits.en_icbi = 1;
     mthid1(hid1.word);
 
-    for (ra = 0; ra < cpu_caches.isize; ra += cpu_caches.iline_size)
-        icbi(ra);
+    for (ea = 0; ea < cpu_caches.isize; ea += cpu_caches.iline_size)
+        icbi(ea);
 
     sync();
 
     hid1.bits.en_icbi = 0;
     mthid1(hid1.word);
 
-    local_irq_save(flags);
+    local_irq_restore(flags);
 }